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Detailed
circuit analysis and design.
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Verilog
and VHDL for systems modeling and synthesis.
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Memory
design: Flash, EEPROM, SRAM, embedded DRAM, cache & tag
RAM.
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Custom
design of datapaths, multipliers and arithmetic processors.
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Mixed-signal
CMOS design and layout: DACs, bandgaps, charge pumps, ADCs,
oscillators.
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CMOS
logic design, semi-automated layout generators, p-cell development.
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Standard
cell library development.
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Floorplanning,
final integration, global routing and verification.
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Pads,
pad rings, test structures, mask creation and submission.
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Back-end
CAD development: LVS & DRC decks, layout post-processing
software.
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Front-end
CAD development: netlist generators & processors, standard
cell library generation and characterization, CAD framework
integration, CAD migration.
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DFT,
ATPG, fault-grading and testability analysis.
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